Designing with an ARM-based SoC

Learn to design a system containing the ARM® Cortex®-A9 Hard Processor System (HPS) on Cyclone® V, Arria® V, & Arria® 10 SoCs. Learn hardware aspects to design the SoC system with hands-on labs. Learn to add & configure the processor component into a Qsys system. Perform debug of the hardware system using debug tools like Signal Tap logic analyzer & System Console. Learn hardware to software files handoff to simplify aspects of software development. Perform low-level debug of the FPGA interacting with the software debugger. Learn ways FPGA & HPS components can be loaded & booted. At completion, you'll be able to use the SoC device in your own design. *ARM and AMBA are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved.

At Course Completion you will be able to:

• Create, manage, and compile an SoC based FPGA in the Qsys tool.
• Simulate the HPS interfaces using Qsys testbench and simulation model generation features.
• Bring up and debug an SoC with the system console tool.
• Explain the hardware to software file handoff.
• Design and debug with a Cyclone® V based development kit.

Skills Required

• FPGA knowledge is not required, but a plus.

Prerequisites 

We recommend completing the following courses:

• Introduction to the Platform Designer System Integration Tool (Qsys).

Follow-on Courses 

Upon completing this course, we recommend the following courses (in no particular order):

• Developing Software for an ARM-based SoC.